Espressif Systems /ESP32 /I2C0 /INT_RAW

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Interpret as INT_RAW

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXFIFO_FULL_INT_RAW)RXFIFO_FULL_INT_RAW 0 (TXFIFO_EMPTY_INT_RAW)TXFIFO_EMPTY_INT_RAW 0 (RXFIFO_OVF_INT_RAW)RXFIFO_OVF_INT_RAW 0 (END_DETECT_INT_RAW)END_DETECT_INT_RAW 0 (SLAVE_TRAN_COMP_INT_RAW)SLAVE_TRAN_COMP_INT_RAW 0 (ARBITRATION_LOST_INT_RAW)ARBITRATION_LOST_INT_RAW 0 (MASTER_TRAN_COMP_INT_RAW)MASTER_TRAN_COMP_INT_RAW 0 (TRANS_COMPLETE_INT_RAW)TRANS_COMPLETE_INT_RAW 0 (TIME_OUT_INT_RAW)TIME_OUT_INT_RAW 0 (TRANS_START_INT_RAW)TRANS_START_INT_RAW 0 (ACK_ERR_INT_RAW)ACK_ERR_INT_RAW 0 (RX_REC_FULL_INT_RAW)RX_REC_FULL_INT_RAW 0 (TX_SEND_EMPTY_INT_RAW)TX_SEND_EMPTY_INT_RAW

Fields

RXFIFO_FULL_INT_RAW

The raw interrupt status bit for rxfifo full when use apb fifo access.

TXFIFO_EMPTY_INT_RAW

The raw interrupt status bit for txfifo empty when use apb fifo access.

RXFIFO_OVF_INT_RAW

The raw interrupt status bit for receiving data overflow when use apb fifo access.

END_DETECT_INT_RAW

The raw interrupt status bit for end_detect_int interrupt. when I2C deals with the END command it will produce end_detect_int interrupt.

SLAVE_TRAN_COMP_INT_RAW

The raw interrupt status bit for slave_tran_comp_int interrupt. when I2C Slave detectsthe STOP bit it will produce slave_tran_comp_int interrupt.

ARBITRATION_LOST_INT_RAW

The raw interrupt status bit for arbitration_lost_int interrupt.when I2C lost the usage right of I2C BUS it will produce arbitration_lost_int interrupt.

MASTER_TRAN_COMP_INT_RAW

The raw interrupt status bit for master_tra_comp_int interrupt. when I2C Master sends or receives a byte it will produce master_tran_comp_int interrupt.

TRANS_COMPLETE_INT_RAW

The raw interrupt status bit for trans_complete_int interrupt. when I2C Master finished STOP command it will produce trans_complete_int interrupt.

TIME_OUT_INT_RAW

The raw interrupt status bit for time_out_int interrupt. when I2C takes a lot of time to receive a data it will produce time_out_int interrupt.

TRANS_START_INT_RAW

The raw interrupt status bit for trans_start_int interrupt. when I2C sends the START bit it will produce trans_start_int interrupt.

ACK_ERR_INT_RAW

The raw interrupt status bit for ack_err_int interrupt. when I2C receives a wrong ACK bit it will produce ack_err_int interrupt…

RX_REC_FULL_INT_RAW

The raw interrupt status bit for rx_rec_full_int interrupt. when I2C receives more data than nonfifo_rx_thres it will produce rx_rec_full_int interrupt.

TX_SEND_EMPTY_INT_RAW

The raw interrupt status bit for tx_send_empty_int interrupt.when I2C sends more data than nonfifo_tx_thres it will produce tx_send_empty_int interrupt…

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